Sequential System Specification
We have seen this slide earlier. This one tells the difference between the combinational logic and the sequential logic. And we mentioned about that key differences, the sequential circuit, there is a memory unit, which stores the current contents of the, the system. And this current content of the system will come back here, affect the combinational logic, which is going to eventually impact the outputs. So, the outputs is not only dependent on the input. It also depends on the memory units. So, before we talk about how to specify and how to design sequential systems, the first thing we need to, we need to answer is, so how do we store the memory unit? So the basic memory unit is called a latch, which has two outputs, a Q and a Q prime, which are always complementary to each other. And depends on what kind of latches you are using, there are different ways to fit the latches, and here is a small example of a NOR Gate for latch. So, what we have here is we have an input R and S stands for set and reset. And these are the two outputs, Q and Q complement. And in the middle there are two NOR Gates, and then they are cross coupled. So let's see, I mean, what happens with this circuit. So if I set S to be 0 and R to be, I'm sorry if I set S to be 1 and R to be 0. And this one is going to produce an output of 0 for gate two. Now then these two 0 will come back here. So now I have two 0s to NOR gate number 1. And that, it will produce output of 1. And this 1 comes back. And the two 1's make this NOR gate a constant 0. So what we see here is, the circuit becomes stable. And then we have Q equal to 1 and Q 0, Q prime equal to 0, complement to each other. So now what do I do is, now let's assume that I change the signal of S to 0. So instantaneously, this 0 is going to change. So this 0 and the 1 here makes this 1 still a 0 because I have a 1 here. 1 and 0 make this NOR gate a 0. So because this 0 doesn't change, for this gate, nothing's changed. 0 is here, and then 0 coming back, making a 1. So that means, if I change this to a 0, the system status doesn't change, 'kay? And you can analyze, once we further change this to a 1, other things will be different, because this 1, will change this to a 0, and then this 0, will, make this two 0s, change this one back to a 1. And this one coming back, make this one a stable 0. So the system will flip. The Q changes from 0, from 1 to 0. And then Q prime changes from 0 to 1. So what we have seen here is, so the output of this latch, Q and Q prime, depends on R and S. And however it can do becomes stabilized. Can store a value here, either 1 or 0. And one problem about this latch is the output changes as soon as the input changes. So, this is what we called asynchronous system and which may not be what we prefer. So, the flip-flops is a solution to solve this problem. It is very similar to a latch. But, however, it has a signal to control when output can change. So this is the RS Flip-Flop implemented using four NAND gates. And we're not going to go through details about how this one is implemented. We'll just show you the logical diagram for RS Flip-Flop. So what you see here is we have three inputs. SR, which we called the flip-flop input function. And there is this signal which is, normally, we call the cog pause. This is the cog signal. And for this systems, we want to make sure that at least one of the input our dies will be 0. We don't want to, to set and to reset at the same time, otherwise the system becomes unstable. And the systems have two output, Q and Q prime, which are supposed to be complement to each other all the time. And what will be the memory content? We'll assume that currently it has Q of t. And at time Q of t plus 1, what would this, this memory be? It is, depends on the input as an R, and also the current memory content following this formula here. S plus R prime times Q of t. And while we design sequential systems, we want to know that, how we can give, flip flop input functions values such that the flip flop would change as we want. So for example, consider this SR flip flop. Let's see, we want to change the Q from 0 to 1. How can we make that happen? So this table which is called excitation table tells you how you can make that happen. As soon as you set S equal to 1 and R equal to 0, you are going to set the flip flop, so next time the flip flop, it will have a 1. And to, for another example, if you want the system to stay at 1, 1, no change. What you do is you can set, reset. You code with 0, you're not going to reset. And then this set signal, you don't really care. And these are the excitation table for two of the three other popular flip flops. The D flip flop, flip flop, which the next content is the same as the data here, regardless of the previous value here. And then the toggle flip flop, which whenever the toggle signal is 1, the flip flop counted will be flipped. Otherwise it remains the same. And then the J K flip flop, which is similar to I's flip flop. So now let's use a small example to see how we can specify synchronous systems. We want to design a circuit with one input x and then three outputs, A, B, Cs. And the, the x will have one bit per clock cycle. When x equal to 0, the output remains no change. When x equal to 1, it's going to repeat the binary sequence 0, 1, 3, 7, 6, 4, one at a time. So what we have here is we want to draw the state transition table. So in the state transition table what we have is, we have a big column of the current state, and then we want to go from the current state to see what will be the next state. And then the next state depends on the input value, so based on different input values, the next stage can be different. Like in this case, if x is 0, the statement remains, no change. So that is why these two columns, they are identical. And then, while x is 1, we go from 0 to 1. We go from 1 to 3, and so on. And we can represent exactly the same information with this we called the state transition graph. In a state transition graph we have states, and for each state we have outgoing edges which are the transitions. It tells you that from this state, given an input where this next state will be, and what will be output. So, it represents exactly the same information as the state transition table.
Sequential System Implementation
So now let's talk about the typical design procedure for a sequential system. This starts with how to specify the system. And then we try to build the state transition table sometimes with the help of the state transition diagram or graph. And then we minimize the number of states in the state table. And then we do we a state encoding, which is similar to input encoding. And then we select what type of flip-flop we want to use. Normally it's based on experience. And then we build excitation table and output table. And finally, we do a combination of logical design, so simplify the logic for flip-flopping the functions. And then draw the logical diagram. So now let's show this design process using an example here. So in this example we assume that we have already done the state transition graph here and we have already minimized the state, we have already encoded the state. So the states, they're not called s y s to s 4. They're called 0/0, 1/0, 1/1, 0/1, et cetera, 'kay. And also we assume we have already decided we want to use T flip-flop. So I'm going to show you that how we can build the excitation and output the table based on the state transition graph and the flip-flops we are going to use. So what we do is, we start from the current state, and with different input values, these are zero or one. And then from this state transition table, we can figure out what is the next stage. So for example, start from 0 0. If input is 0, I move on to state 0 1. And hat is why I put 0 1 here. 'Kay? And then for the next, for the next column here, the flip-flop input function. And I have the flip-flop input for A, and the flip-flop for B. So for A, what I see here is currently I'm zero and then next time I still want a zero. I go back to my excitation table, I see from zero to zero, the T input should be a zero, so that is why I put a zero here. And however for the second flip flop, B, it changes from zero to one. So from the excitation table we know that to enable the T flip-flop to go from zero to one I need to set the T input to a one. And that is why I put a one here. So this is the way we try to build this excitation table and output table. Once we have this table this becomes a combination of logical design problem. You have input kernel state and input. And then you want to determine these functions as a Boolean expression of the input. And these are the flip-flopping for the functions, is that output of the circuit. So now we have put excitation table and output table, so we can consider this two flip-flop input functions TA and TB, and an output of y as a function of the input signals. Current state A and B and the input x. And when we do a function simplification we find out TA equal to exclusive of A and B. And then TB equals the exclusive nor of A and x. And we can easily draw the logical diagram. So the previous example, actually in that case it is a completely specified state, state machine. Which means that from any state, for any input, possible input value we have a next state specified. What happens if the system is not completely specified? Which we called incomplete, incompletely specified. So consider this case. We want to have a system that generates the pattern 0, 1, 3, 5, 7 in a row, in a circular way. And we can easily build a table here with 0, 1, 3, 5, 7. We do the binary numbers for three flip, flip flops A, B, C here with their binary value. So then the current state, the next state, current state, next state. And what happens with the, the design here? So when we use, want to use two flip-flops we say okay, you want to go from zero to zero, I'll give TA a zero. You want to go from zero to one for C, I'll give TC a one. So this is fairly easy to build, this is the one we called the excitation table. And however, what happens with these three other cases? One flip flop will be 2, 4, 6, which is, A happens to be zero, B happens to be one, C happens to be zero, that is the binary two. In this case, the system doesn't specify what will be the next stage, so this is what we will consider as don't cares. Because the output is the don't care, so the flip flop input function will also be don't cares. So now when we have all these don't cares, it will help us to simplify the Boolean function for these flip flop input functions. In this particular case we find out TA equal to B, TB equal to C and TC equal to C prime plus AB. And we had drawn a logical diagram in this way. Now the question is, once you have a digital circuit here, these circuit they are not going to produce don't cares for the system. Whenever the system has a determinist value, they are going to produce a deterministic output. So when we do a circuit analysis, we realize that in these three cases here, and their next state, at first to figure out the TA, TB, TC value. either from this equation or from this circuit here, from this input. And it happens to be these three values here. And then based on the functionalities of the T flip-flop. once I have a 1 I need to flip. So I got a 1, 1, and I have a 0, that's still no change. So that is how I figure out this, do this circular analysis. And in this particular case, I know the kernel stage. I know the next stage. I know the kernel stage. I know the next stage. I know the kernel stage. I know the next stage. For these three, you completely specified the cases. What happens to the original system spec? When the system is at 2, it goes to 7. When the system is at 4, it goes to 5. When it is at 6, it goes to 3. So this is a good case because if the system starts with one of these unspecified system, after one clock cycle, it comes to this loop. And then it will stay in the loop forever. So in that sense we call this system is self-correcting. And later on we are going to see that by not specify the systems completely, we are going to introduce security vulnerabilities.
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